With the rapid development of information technology, the ARM technology solution architecture is a 32-bit embedded microprocessor with low power consumption, high performance, and small size. It has obtained many authorized users of intellectual property, including the world top. Semiconductor and systems companies. It has been widely used in various electronic products, automotive, consumer entertainment, imaging, industrial control, mass storage, networking, security and wireless. According to the industry, ARM-based technology solutions are the most market-oriented and market-oriented solutions.
Fieldbus CAN is a serial communication protocol developed to solve the data exchange between many electronic control modules in modern automobiles. Because it has multi-master station for bus access according to priority, non-destructive bus arbitration can be used to complete error checking and priority discrimination of communication data. The data length is up to 8 bytes, the transmission time is short, and the probability of interference is Low, strong anti-interference ability, communication speed up to 1Mbit/s, etc. It is widely used in automotive, industrial, consumer electronics and other fields, and is recognized as one of the most promising fieldbuses.
Based on the advantages of ARM in embedded systems and the wide application of CAN bus, more and more ARM processors have their own CAN controllers inside, which greatly facilitates the development of CAN bus by developers. However, there are still some ARM processors in the product that do not have a built-in CAN controller. In order to adapt to the real-time and reliability requirements of data transmission between nodes, and without changing the original hardware structure, the CAN interface module is expanded. To achieve CAN communication has become a more appropriate choice.
Based on the ARM7TDMI-S processor LPC2131, this paper designs a hardware circuit for the more common CAN interface module for the processor without integrated CAN controller, and designs the reliability of the CAN bus, and it is based on the embedded real-time operating system. μCOS-II realizes CAN communication, and carries out the design of embedded software. Finally, the reliability and feasibility of CAN bus communication are verified in practice.
LPC2131
The Philips LPC2131 is a high-performance 32-bit RISC microcontroller based on ARM7TDMI-S. It has all the advantages of ARM processor: low power consumption and high performance. At the same time, it has rich on-chip resources, which is very suitable for embedded products. Development. Its characteristics are as follows:
· Integrated Thumb extension instruction set.
32KB of in-system programming (ISP) on-chip Flash and in-application programming (IAP) 8KB RAM with vectored interrupt controller.
2 UARTs, 2 I2C serial interfaces, 2 SPI serial interfaces, 2 timers (7 capture/compare channels), PWM unit can provide up to 6 PWM outputs, 8-channel 10-bit ADC, real-time Clock RTC, Watchdog Timer WDT, 48 general purpose I/O pins.
CPU clock up to 60MHz with on-chip crystal oscillator and on-chip PLL.
The LPC2131 does not have an integrated CAN controller inside, and cannot communicate using the CAN bus. In order to enable the LPC2131 to communicate using the CAN bus, it can be extended by external expansion.
Hardware circuit design
Since the LPC2131 is a 3.3V-powered ARM7TDMI-S microprocessor, each IO pin is 3.3V TTL level and can withstand 5V. The independent CAN controller SJA1000 is powered by 5V, and the level of each IO port is 5V TTL level, so the two are compatible, and their IO can be directly connected.
LPC2131 interface with CAN controller
The interface between LPC2131 and CAN controller is shown in Figure 1. P0.8~P0.15 of LPC2131 is directly connected with AD0~AD7 of SJA1000 to realize data interaction. P0.22, P0.25, P0.31, P0.23 respectively SJA1000's ALE/AS, RD/E, WR, and CS are connected to read and write and chip select. P0.30 and P0.27 are connected to SJA1000's INT and RST respectively to implement interrupt and reset. When the LPC2131 accesses the SJA1000, it can be simulated by software to simulate the read/write timing specified in the SJA1000. The mode pin MODE of the SJA1000 is set high by VCC, which makes the SJA1000 work in Intel mode.

Figure 1 LPC2131 and CAN controller interface circuit
CAN transceiver and CAN bus interface
The interface between the CAN transceiver and the CAN bus is shown in Figure 2. The TX0 and RX0 of the SJA1000 are connected to the TXD and RXD of the CAN transceiver respectively, in order to improve the anti-interference ability of the interface part of the CAN transceiver 82C250 and the CAN bus. The 82C250's CANH and CANL pins are connected in series with a common-mode choke to eliminate certain common-mode interference, allowing the bus differential signals to pass smoothly. And CANH and CANL are connected to the bus through a magnetic bead respectively to eliminate certain high frequency interference. At the same time, two small 30pf capacitors are connected in parallel between CANH and CANL and ground, which can filter high frequency interference on the bus and certain anti-electromagnetic radiation. In addition, a TVS is connected between the two CAN bus access terminals and the ground. When the CAN bus has a higher voltage, it is grounded through the breakdown of the TVS, which can play a certain overvoltage protection. A slope resistor is connected to the Rc pin of the 82C250 to reduce the outward radiation of the CAN bus.

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