Explore the digital power management architecture

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With the development of power technology, digital power management technology is increasingly used in various systems. Most of today's systems except the main CPU, logic circuit FPGA, DDR and other digital chips, only the power management chip is left, so the controllability and integration of the power management chip is extremely important, digital power management is positive It is in line with this demand of the market.

Several main architectures of digital power management With the development of power management technology, digital power management has gradually become a recognized development direction in the industry. The I2C/SMBus physical interface has become a universal standard digital power management interface, and the PMBus protocol has become a universal digital power management protocol. . However, in different application phases and application environments, digital power management technology has evolved into several different system architectures.

Using a centralized digital power management IC + analog power supply, this architecture is more common than a few years ago. Due to the need for power supply monitoring and control by system vendors, and the relative scarcity of digitally controlled power products, this architecture can be used to meet the needs of system designers, and is widely used in a variety of high-performance systems. The characteristic of this architecture is to use a dedicated digital IC with voltage and current sampling to sample the input and output voltages, currents, etc. of each discrete analog power supply and then adjust it through system analysis or output to the master IC. This architecture can be called a centralized digital power management architecture (Figure 1). Representatives of this type of program are referred to as Linear Technology's LTC2978.

Figure 1. Centralized digital power management architecture.

A single power management IC integrates multiple power rails, and the system master IC monitors each power rail through the bus. This kind of system architecture is what we usually call the PMIC architecture. This architecture is mostly used in small-dimensional systems such as handheld devices. This type of system generally requires only a single PMIC to manage the entire system. The system main control IC directly manages each power rail through the I2C/SMBus interface of the PMIC to achieve high efficiency and high integration. The representative of this type of product is Intersil's ISL9305H, which integrates a two-way switching regulator and two linear regulators in a single chip, using I2C's standard interface to communicate with the host IC for high integration and The purpose of controllability.

Using a dedicated digital power supply with an I2C/SMBus interface, the system's host IC manages discrete power rails via the bus. This architecture features a common digital power management product, with each system power rail passing through The unique address is connected to the system bus, and the master IC monitors and controls the corresponding power rail through the address. Representatives of these products are Intersil's Zilker Labs digital power product line (Figure 2).

Figure 2. Distributed digital power management architecture.

Features of different digital power management architectures

The first architecture is simple to implement, system designers can keep the original analog power products unchanged, but can be realized by adding a dedicated digital power management IC, so it is widely used in various high-performance systems. in. However, this architecture also has its inherent disadvantages. Since each power rail in the system is distributed at different locations on the system board, the management IC needs to separately sample, detect, and control each power rail, thus configuring each power rail. Complex monitoring circuits such as voltage, current and temperature. On the one hand, the analog power solution itself requires a large number of peripheral circuits to ensure its reliability, while the peripheral monitoring circuit will increase the wiring difficulty of the system board, thereby reducing the integration of the system board; on the other hand, these monitoring lines are mostly small The signal line has poor anti-interference ability and is easily susceptible to sampling errors caused by external noise, resulting in reliability problems.

The second architecture, due to the limitations of the PMIC product itself, although its reliability and power density are very good, but the adaptability is poor, only for certain small and micro systems; and large systems, such as industrial control systems, Applications such as communication base station systems and high-speed data processing systems have many complex functions, many functional modules, and much larger power supply modules. The power management system is more complicated, and the PMIC cannot meet such applications. For similar small and micro systems such as mobile phones and handheld mobile Internet devices, because the functional modules are relatively fixed, the power supply architecture is relatively simple. The PMIC can meet the requirements of such devices and integrate all the power rails required by the system. To the single power management IC, the integration of the power management scheme is mentioned to the highest.

The third architecture is simple and easy to implement, and the control strategy is convenient and easy. At the same time, the discrete power rails are controlled by the bus, the external wiring is small, the reliability is high, and the anti-interference ability is strong. Therefore, it has been widely used in various high performances in recent years. And highly integrated systems. In addition, traditional high-performance power chip suppliers Intersil, Linear, TI, etc. have corresponding digital power solutions. With the promotion of its promotion and the increase of shipments, the cost has also been reduced to a reasonable range. Designers are beginning to favor this option.

Among them, Intersil, the best in digital power products, has greatly advanced the development of distributed digital power systems. Intersil's Zilker Labs family of digital power management control ICs uses the advanced all-digital control mode to bring the power density of power solutions to the highest level in the industry. And for the reliability requirements of the distributed power architecture, multiple chip-level solutions are provided to facilitate the customer to optimize the system.

Taking the representative chip ZL6105 of Intersil digital power products as an example, this digital power chip adopts the all-digital control method and adopts the I2C/SMBus interface, which can be managed by the PMBus protocol instruction set. It uses a special power management processor + State machine mode for digital control. The advantages of this kind of digital controller are: on the one hand, it can avoid the power failure caused by software running; on the other hand, it avoids the delay generated by the software calculation link, realizes the response of the faster feedback loop, and makes the dynamics of the power supply scheme The response is greatly improved (Figure 3).

In addition, this chip also fully considers the power reliability requirements. One of the main risks of adopting a distributed power architecture is that when the power part of the power supply fails, if the communication part of the chip also fails, it may not only cause the system to lose control, but also the advantages of easy maintenance of the digital power supply, and may also result in The entire system was damaged. The ZL6105 chip is designed with the risk in mind. The communication part and the power part of the chip are designed and isolated, so that even if the power part fails, the function of the communication part will not be affected. The protection and alarm sections are still working, so that the risk of system damage can be minimized.

The ZL6105 also has an automatic compensation algorithm built in. It is convenient for system designers to use, and the automatic compensation algorithm can optimize the dynamic response of the power supply, making the reliability and stability of the power supply better. The ZL6105's automatic compensation function can also output the simulation characteristics of the system to the user interface through three effective parameters (the three parameters are gain Gc, quality factor Q and natural frequency F). The user can read these three parameters. A deeper understanding of the external output characteristics of the power solution, and through a long-term tracking of changes in its characteristics, the reliability of the system can be effectively evaluated through the statistics of this set of parameters. This feature also points to a feasible direction for the evaluation of long-term reliability of the system.