The intelligent fetal monitoring system uses the MSC1210 microprocessor with a 24-bit A/D converter from TI and has strong analog performance and digital processing capabilities. The microprocessor selects, buffers, amplifies, and adjusts the input channels. A/D conversion and digital processing are integrated into a single-chip circuit. Only one integrated circuit can be used to achieve data acquisition such as fetal heart rate, contraction pressure, and number of fetal movements, and control of the voice and vibrator. The control of smart fetal monitoring is based on the fetal heart rate. How to accurately and timely obtain the fetal heart rate is the control prerequisite for the smart fetal monitoring system. Because fetal heart Doppler signals have low signal-to-noise ratio and non-stationary random characteristics, 1/2, 2/3, and 2 times heart rate occur when fetal heart rate is calculated, resulting in a control error. Here, a dual threshold algorithm is combined with wavelet analysis. Accurate and real-time rate of fetal heart rate is ensured to ensure the effective implementation of intelligent control.
Intelligent computer fetal monitoring system structureIntelligent computer fetal monitoring system block diagram shown in Figure 1. Mainly by ultrasound Doppler fetal heart probe, contraction probe, fetal movement probe, fetal heart signal conditioning circuit (low-pass filtering, absolute value calculation and envelope extraction, etc.), contraction pressure signal conditioning circuit, voice control, acoustic resonator , MSC1210 microprocessor and computer processing system components. MSC1210 and computer processing system as the core.
The MSC1210 controls the collection and communication of monitoring indicators and receives computer commands to control the voice and acoustic resonators. The computer system implements functional modules such as intelligent control, communication control, data processing algorithms, and monitor display.
Signal Conditioning CircuitIn view of the importance of fetal heart rate monitoring indicators and the complexity of fetal heart Doppler signals, the framing of the fetal heart Doppler signals is highlighted here. The circuit mainly performs preprocessing such as low-pass filtering, absolute value calculation and envelope extraction on the Doppler fetal heart sound signal. The low-pass filter uses a second-order low-pass filter with a cut-off frequency of 250 Hz to filter out high-frequency signals and interference. The absolute value operation circuit is shown in Fig. 2. The signal intensity is doubled and the detection sensitivity is improved. Envelope extraction circuit shown in Figure 3, using a cut-off frequency of 10HZ П-filter and T-filter combination of low-pass filter. Parallel diodes and capacitors limit the negative signals in the circuit and dampen high-frequency signals in certain frequency bands.
Smart fetal monitoring and acquisition system adopts a powerful single-chip microcomputer MSC1210 introduced by Texas Instruments as a processor. The MSC1210 chip integrates an 8051 microcontroller and FLASH memory precision analog-to-digital converter. The chip uses an enhanced 8051 microcontroller core. It shortens the instruction execution cycle, uses a low-power design, and internally integrates a 24-bit resolution analog-to-digital converter (ADC) with a conversion speed of up to 1000HZ, an 8-channel multiplexer, and an analog input channel test current source. Input Buffer, Programmable Gain Amplifier (PGA), Internal Reference, 8-bit Microcontroller, Program/Data Flash Memory, and Data SRAM. The digital filter filters the output data. Digital filters are fast, sin2 and sin3. The enhanced 8051 core has two data pointers. Its instruction system is fully compatible with the standard 8051 instruction system. Its execution speed is three times faster than that of the 8051, so it can operate at low frequencies to reduce power consumption and noise. In order to reduce the interference, its analog power supply and digital power supply are separately powered. Because the integrated level of the chip makes the hardware circuit of the intelligent fetal monitoring system simple, the circuit design is more concise, and the external components of the chip are very few, so that the reliability of the system is greatly improved, and the development period is greatly shortened, and the development cycle is reduced. Development costs. MSC1210 interface circuit principle shown in Figure 4. Doppler fetal heart signal and contraction pressure signal by IN0 and IN2 input, after the multiplexer into the buffer, the variable gain amplifier to the input signal amplification. The fetal movement signal is interrupted by the MSC1210. The MSC1210 receives the control commands issued by the computer via the RS485 bus. After the voice chip is controlled by the P2 port, the voice reminder function is completed and the P1.7 control of the sound oscillator completes the automatic fetus wake-up function. Using MSC1210 as a microprocessor can more accurately and timely obtain fetal monitoring indicators, providing protection for intelligent control.
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