Moore's Law, which has been applied for more than 20 years, has gradually shown signs of failure in recent years. Judging from the chip's manufacturing, 7nm is the physical limit of the silicon material chip. However, according to foreign media reports, a team of Lawrence Berkeley National Laboratory broke the physical limit, using carbon nanotube composite materials to reduce the current most sophisticated transistor process from 14nm to 1nm. So, why 7nm is the physical limit of the silicon material chip, what is carbon nanotube composite material? What should China do in the face of U.S. technological breakthroughs?
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| What is the concept of XX nm manufacturing process?The chip's manufacturing process is often represented by 90nm, 65nm, 40nm, 28nm, 22nm, and 14nm. For example, Intel's latest six-generation Core CPUs use Intel's own 14nm manufacturing process. The current CPU integrates billions of transistors. The transistor consists of a source, a drain, and a gate located between them. Current flows from the source to the drain, and the gate controls the current flow. The role.
The so-called XX nm actually means that the width of the gate of the complementary oxide semiconductor field effect transistor formed on the CPU is also referred to as the gate length.
The shorter the gate length, the more transistors can be integrated on the same size silicon chip - Intel once claimed to reduce the gate length from 130nm to 90nm, the area occupied by the transistor will be reduced by half; in the chip transistor integration Under certain circumstances, using more advanced manufacturing processes, the smaller the area and power consumption of the chip, the lower the cost.
The gate length can be divided into the photolithography gate length and the actual gate length, and the photolithography gate length is determined by the photolithography technology. Due to the diffraction of light in lithography and the steps of ion implantation, etching, plasma rinsing, heat treatment and the like in chip manufacturing, the lithography gate length and the actual gate length may be inconsistent. In addition, under the same process technology, the actual gate length will be different. For example, although Samsung also introduced a 14nm process technology chip, the actual gate length of the chip still has a certain gap from the actual gate length of Intel's 14nm process chip.
| Why 7nm is the physical limit?It was previously explained that shortening the length of the transistor gate can enable the CPU to integrate more transistors or effectively reduce the area and power consumption of the transistor and reduce the cost of the silicon wafer for the CPU. It is for this reason that CPU manufacturers have spared no effort to reduce the transistor gate width to increase the number of integrated transistors per unit area. However, this approach also shortens the distance that the electrons move, and easily causes the movement of the electrons inside the transistor from the negative electrode to the positive electrode through the silicon substrate of the transistor channel, that is, leakage. Moreover, as the number of transistors in the chip increases, the silicon dioxide insulating layer, which was originally only a few atomic layers thick, will become even thinner, resulting in the leakage of more electrons. The leakage current then increases the extra power consumption of the chip.
In order to solve the problem of leakage, Intel, IBM and other companies can be said to have passed through the sea. For example, Intel integrated high dielectric films and metal gate ICs in its manufacturing process to solve the leakage problem; IBM developed SOI technology—a layer of strong dielectric film buried in the source and drain to solve the leakage problem; There is also fin field-effect transistor technology - to increase the capacitance by increasing the surface area of ​​the insulating layer and to reduce the leakage current so as to prevent the electronic transition from happening.
The above method can effectively solve the leakage problem when the gate length is greater than 7 nm. However, on the basis of using existing chip materials, once the transistor's gate length is lower than 7 nm, the electrons in the transistor can easily cause tunneling effects, which poses a huge challenge for the manufacture of the chip. To solve this problem, finding new materials to replace silicon to make transistors below 7nm is an effective solution.
| 1nm transistors is still in the process at the laboratory stageCarbon nanotubes and graphene, which are very popular in recent years, have a certain connection. Zero-dimensional fullerenes, one-dimensional carbon nanotubes, and two-dimensional graphene belong to the carbon nanomaterial family and can formally satisfy each other after satisfying certain conditions. Conversion. Carbon nanotubes are a kind of one-dimensional material with a special structure. Its radial size can reach nanometer scale, and the axial dimension is micron level. The ends of the tube are generally sealed, so it has great strength and huge The aspect ratio is expected to make it a very good tough carbon fiber.
Carbon nanotubes and graphene have similar properties in terms of electrical and mechanical properties, have better electrical conductivity, mechanical properties, and thermal conductivity, which makes carbon nanotube composites in supercapacitors, solar cells, displays, bioassays, fuels Batteries and other aspects have a good application prospects. In addition, carbon nanotube composites doped with some modifiers are also attracting people's attention. For example, adding a CdTe quantum dot on a graphene/carbon nanotube composite electrode to make a photoelectric switch and doping with metal particles to make a field emission device. The foreign media reported that the Lawrence Berkeley National Laboratory reduced the current state-of-the-art transistor process from 14 nm to 1 nm. The transistor is made of carbon nanotube-doped molybdenum disulfide. However, this technological achievement is only at the stage of breakthrough in laboratory technology. At present, there is no commercial production capacity. As to whether this technology will become mainstream commercial technology in the future, it still needs time to test it.
Technological progress does not necessarily bring commercial benefits
In the past few decades, because Moore's Law has really played a role, China's semiconductor manufacturing technology has always been pulled out of the country for a while after catching up with the West. In recent years, the progress of chip manufacturing technology has slowed down and the objective phenomenon of the failure of Moore's Law has been a great advantage for the Chinese semiconductor industry to catch up with the West. The failure of Moore's law, on the one hand, has both technical factors - advanced lithography machines, etching machines and other equipment and advanced chip manufacturing technology development technology is difficult, high capital requirements ... on the other hand there are also commercial factors.
Until the manufacturing process reaches 28nm, every advancement in the manufacturing process will enable chipmakers to make huge profits. However, after the manufacturing process reached 14/16 nm, the advancement of technology will increase the cost of the chip. When Intel first developed the 14 nm manufacturing process, it was reported that the mask cost was 300 million US dollars. Of course, with time and TSMC, Samsung master 14/16nm process, the current price should not be so expensive. However, Intel is developing a 10nm process, according to Intel official estimates, mask costs at least $ 1 billion. The reason why the new manufacturing process is expensive is the high cost of research and development and the low yield of the new process. On the other hand, the cost of the lithography machine, etching machine and other equipment is extremely expensive. Therefore, even if the advanced manufacturing process is technically mature, due to the excessively high masking cost, the customer may think twice about adopting the most advanced manufacturing process. For example, if the output of the 10 nm manufacturing process chip is lower than 1000 Millions of chips, then the cost of the mask allocated to each chip is as high as 100 US dollars, according to the internationally accepted low-profit chip design company's pricing strategy 8:20 pricing method - that is, the hardware cost of 8 cases, pricing At 20, don’t think this pricing is high. In fact, it’s already very low. Intel’s general pricing strategy is 8:35, and AMD has reached 8:50 in history... Even if it does not calculate the cost of wafers and the cost of packaging and testing, this The 10nm CPU will not be less than $250. At the same time, a relatively small number of customers can make it difficult to apportion costs with huge production volumes, and ultimately allow companies to slow down the development and commercial application of advanced manufacturing processes. It is because of this that 28nm manufacturing processes are considered to be very dynamic by some people in the industry and will continue to be used for several years.
| China should work hard to solve real problemsFor the Lawrence Berkeley National Laboratory to reduce the current state-of-the-art transistor fabrication process from 14nm to 1nm, people don't have to take it too seriously, because this is just a technical breakthrough in the lab, even if it goes a step further, This technology has matured and can be commercialized. Because it is more difficult to commercialize than the 10nm manufacturing process that Intel is developing, its cost will be extremely high, which will make the price of chips produced using this technology remain high. This will lead to fewer customers to choose the technology, and then a vicious circle ... ... From the commercial factors, most IC design companies may still choose to be relatively mature, or relatively "old" manufacturing process.
For the current Chinese semiconductor industry, instead of spending huge human and financial resources to explore the 7nm physical limit, it is better to use the limited human, financial and material resources to perfect the IP library of the 28nm process technology and to commercialize the 14nm manufacturing process. After all, in the field of national defense security, the existing manufacturing process is fully adequate (many American military chips are still 65nm). For commercial chips, many chips do not require high process requirements, like industrial control chips, Automotive electronics, radio frequency, etc. are all used in some hardware enthusiasts look old process, and for PCs and mobile phones, tablet CPUs, GPUs, 14nm/16nm manufacturing process has been able to performance and power consumption The balance of demand is very good. The author believes that it is better to realistically solve practical problems than to spend a lot of resources to research and develop new materials to break through the physical limit of 7nm.
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